1. Field of the Invention
The present invention relates to a drive method of a nanogap switching element and a storage apparatus equipped with a nanogap switching element.
2. Description of Related Art
Further miniaturization of electric elements is now desired as devices have been miniaturized and densified. As an example of the miniaturization, a switching element capable of carrying out a switching operation by the application of a voltage between two electrodes separated by a minute gap (nanogap) is known.
To put it concretely, for example, a switching element has been developed that is made of a stable material of silicon oxide and gold and is manufactured by a simple manufacturing method called as shadow evaporation and further can stably repeat switching operations (see, for example, Japanese Patent Application Laid-Open Publication No. 2005-79335).
Such a switching element having a nanogap (hereinafter referred to as a “nanogap switching element”) is configured to receive an application of a voltage pulse having a predetermined voltage value in order to carry out writing or deletion, and to shift itself from its high resistance state (off state) to its low resistance state (on state) and vice versa.
However, the switching element has a problem of a low probability of being shifted to a desired resistance state (especially to the low resistance state) even if a voltage pulse is applied thereto, especially at the time of being shifted from the high resistance state to the low resistance state. A method of elongating the pulse width (that is, the application time of the voltage pulse applied once) or the like was accordingly examined in order to improve the probability of shifting the switching element from the high resistance state to the low resistance state. However, the method of elongating the pulse width has a problem of needing a long time for the elongation of the application time of the voltage pulse applied once. Moreover, the method has also a problem in which the probability of shifting the switching element from the high resistance state to the low resistance state is insufficient yet even if the pulse width is elongated.
For example, the following methods were proposed accordingly: a method of realizing the reading and writing of multiple-value storage against a memory cell array including a plurality of memory cells, each having a floating gate, (see, for example, Japanese Patent Application Laid-Open Publication No. 2000-200891), a method of writing data into a desired cell without charging and discharging any bit lines to carry out the whole process of data writing without charging and discharging any bit lines with a high voltage in a semiconductor storage apparatus having memory cells to store data by the polarization states of ferro-electric capacitors (see, for example, Japanese Patent Application Laid-Open Publication No. 2004-310971), and a method of improving writing margins without lowering the integration degree of memory cells, each having a magnetic tunnel junction structure, to decrease writing currents without lowering the integration degree in a magnetic random access memory (RAM) device equipped with the memory cells (see, for example, Japanese Patent Application Laid-Open Publication No. 2006-54046).
However, because the memory elements (memory cells) disclosed in Japanese Patent Application Laid-Open Publications No. 2000-200891, No. 2004-310971, and No. 2006-54046, mentioned above, are not the nanogap switching elements, the aforesaid problem of the impossibility of shifting the nanogap switching elements to their low resistance states with a high probability cannot be solved even if the methods described in Japanese Patent Application Laid-Open Publications No. 2000-200891, No. 2004-310971, and No. 2006-54046 are applied to the nanogap switching elements.